New Electronics – NSITEXE Selects ImperasDV for RISC-V Automotive Processor Verification

Imperas Software, a specialist in RISC-V simulation solutions, announced that NSITEXE, part of DENSO Corporation which develops high performance semiconductor IPs for automotive applications, has selected ImperasDV for advanced hardware design verification of the RISC-V processor.

This announcement expands and extends the use of Imperas simulation technology, models, verification IP and tools by NSITEXE for the next generation of 64-bit RISC V-based designs featuring vector accelerators for AI automotive applications (artificial intelligence) with verification leading to the level required to achieve ISO 26262 ASIL D.

RISC-V is an open ISA (Instruction Set Architecture) standard that allows processor developers to optimize configuration with standard extensions and custom instructions. The recently ratified RISC-V vector extensions support the computational requirements of hardware accelerators for applications involving linear algebra, which is well suited for emerging AI algorithms and workloads in advanced automotive applications.

ImperasDV is an integrated solution for RISC-V processor verification that is able to provide an adaptable framework based on the open standard RVVI (RISC-V verification interface) that supports basic RTL verification with the Imperas reference model in a ‘lock-step-compare’ in addition to test suites and other verification IPs.

ImperasDV covers verification tasks for implementations ranging from basic controllers to advanced designs including vector extensions, privileged mode security protections, multi-hart and custom extensions.

Additionally, the freedom of RISC-V’s ISA open standard enables advanced processor technology in many new application areas, with developers exploring techniques such as superscalar, out-of-order execution, multithreading, multicore heterogeneous arrays and processor arrays plus other new approaches for the next generation of domain-specific devices.

“The flexibility of RISC-V ISA combined with the performance of vector extensions is an ideal starting point for AI accelerators for automotive applications,” said Hideki Sugimoto, CTO of NSITEXE, Inc., a DENSO Corporation group company. . “To meet the verification requirements of our next generation of processors, we have developed an optimized verification flow with ImperasDV which our design team has implemented with detailed configuration options to deliver their comprehensive verification plans that deliver the quality cutting-edge that our customers expect.”

“RISC-V’s open ISA enables a new wave of processor design innovation across the spectrum of computing requirements in nearly every market segment,” said Nobuyuki Ueyama, President of eSOL TRINITY. “High quality processor verification is not a simple task, but the ease of use and configurable approach with RVVI offered by ImperasDV enables the eSOL TRINITY team to support the expert design teams at NSITEXE and other major RISC-V adopters in Japan.”

“RISC-V’s open ISA standard enables a fundamental shift in processor development, with developers able to explore and innovate solutions with optimized solutions for targeted applications,” explained Simon Davidmann, CEO of Imperas Software. “RISC-V’s flexibility on the design side has a direct impact on the verification task, and since value-added features are at the heart of development, we have developed ImperasDV to be adaptable to all implementations to to enable our customers and users to verify cutting-edge designs independently.NSITEXE is a pioneer in the development of advanced RISC-V vector accelerators for AI, and we are delighted to see Imperas and ImperasDV technology meet quality requirements automotive applications.