01-06-2022 | Impera Software | Automotive technologies
Imperas Software Ltd announced that NSITEXE, Inc has chosen ImperasDV for advanced hardware design verification of the RISC-V processor. This broadens and extends NSITEXE’s use of simulation technology, models, verification IP and company tools for the next generation of 64-bit RISC V-based designs providing vector accelerators for applications. AI automobiles with verification leading to the level necessary to achieve ISO 26262 ASIL RE.
ImperasDV is the integrated solution for RISC-V processor verification that offers an adaptable framework based on the open standard RVVI that supports basic RTL verification with the Imperas reference model in a “lock-step-compare” methodology as well as for testing suites and other verification IP. It covers verification tasks for implementations that vary from basic controllers to advanced designs providing vector extensions, privileged mode security protections, multi-hart and custom extensions. Additionally, the freedom of RISC-V’s ISA open standard enables advanced processor technology in many new application areas with developers investigating techniques such as superscalar, out-of-order execution, multi-threading , multi-core and heterogeneous processor arrays, plus other new and creative approaches for the next generation of domain-specific devices. The solution completes verification tasks for development teams at the forefront of processor exploration.
“The flexibility of RISC-V ISA combined with the performance of vector extensions is an ideal starting point for AI accelerators for automotive applications,” said Hideki Sugimoto, CTO of NSITEXE, Inc., a DENSO Corporation group company. . “To meet the verification requirement for our next generation of processors, we have developed an optimized verification flow with ImperasDV which our design team has implemented with detailed configuration options to provide their comprehensive verification plans that offer the industry-leading quality our customers have come to expect.”
“RISC-V’s open ISA enables a new wave of processor design innovation across the spectrum of compute requirements in nearly every market segment,” said Nobuyuki Ueyama, President of eSOL TRINITY Co. ., ltd. “High-quality processor verification is no simple task, but the ease of use and configurable approach with RVVI offered by ImperasDV allows the eSOL TRINITY team to support expert design teams from NSITEXE and others. main adopters of RISC-V in Japan.”
“RISC-V’s ISA open standard enables a fundamental shift in processor development, with developers able to explore and innovate solutions with optimized solutions for targeted applications,” said Simon Davidmann, CEO of Imperas Software Ltd. “RISC-V’s flexibility on the design side has a direct impact on the verification task, and since value-added features are at the heart of development, we have developed ImperasDV to be adaptable to all implementations to to allow our customers and users to check the status of NSITEXE is a pioneer in the development of advanced RISC-V vector accelerators for AI, and we are delighted to see Imperas and ImperasDV technology meet the quality requirements automotive applications.